This invention relates to mask-programmable logic devices having both fixed and programmable layers, where the input/output (“I/O”) ports are located in the fixed layers but are programmable.
Programmable logic devices are well known. Early programmable logic devices were one-time configurable. For example, configuration may have been achieved by “blowing”—i.e., opening—fusible links. Alternatively, the configuration may have been stored in a programmable read-only memory. These devices generally provided the user with the ability to configure the devices for “sum-of-products” (or “P-TERM”) logic operations. Later, such programmable logic devices incorporating erasable programmable read-only memory (EPROM) for configuration became available, allowing the devices to be reconfigured.
Still later, programmable logic devices incorporating static random access memory (SRAM) elements for configuration became available. These devices, which also can be reconfigured, store their configuration in a nonvolatile memory such as an EPROM, from which the configuration is loaded into the SRAM elements each time that the device is powered up. These devices generally provide the user with the ability to configure the devices for look-up table-type logic operations. At some point, such devices began to be provided with embedded blocks of random access memory that could be configured by the user to act as random access memory, read-only memory, or logic (such as P-TERM logic).
In all of the foregoing programmable logic devices, both the logic functions of particular logic elements in the device, and the interconnect for routing of signals between the logic elements, were programmable. More recently, mask-programmable logic devices have been provided. With mask-programmable logic devices, instead of selling all users the same device, the manufacturer manufactures a partial device with a standardized arrangement of logic elements whose functions are not programmable by the user, and which lacks any routing or interconnect resources.
The user provides the manufacturer of the mask-programmable logic device with the specifications of a desired device, which may be the configuration file for programming a comparable conventional programmable logic device. The manufacturer uses that information to add metallization layers to the partial device described above. Those additional layers program the logic elements by making certain connections within those elements, and also add interconnect routing between the logic elements. Mask-programmable logic devices can also be provided with embedded random access memory blocks, as described above in connection with conventional programmable logic devices. In such mask-programmable logic devices, if the embedded memory is configured as read-only memory or P-TERM logic, that configuration also is accomplished using the additional metallization layers.
While conventional programmable logic devices allow a user to easily design a device to perform a desired function, a conventional programmable logic device invariably includes resources that may not be used for a particular design. Moreover, in order to accommodate general purpose routing and interconnect resources, and the switching resources that allow signals from any logic element to reach any desired routing and interconnect resource, conventional programmable logic devices grow ever larger as more functionality is built into them, increasing the size and power consumption of such devices. The routing of signals through the various switching elements as they travel from one routing and interconnect resource to another also slows down signals.
The advent of mask-programmable logic devices has allowed users to prove a design in a conventional programmable logic device, but to commit the production version to a mask-programmable logic device which, for the same functionality, can be significantly smaller and use significantly less power, because the only interconnect and routing resources are those actually needed for the particular design. In addition, those resources are simple metallizations, so there are no general purpose switching elements consuming space or power, or slowing down signals.
A more recent generation of mask-programmable logic devices is not directly based on comparable conventional programmable logic devices by the same manufacturer. For example, one such device is shown in copending, commonly-assigned U.S. patent application Ser. No. 10/316,237, filed Dec. 9, 2002 and hereby incorporated herein by reference in its entirety, includes a plurality of more elementary logic areas that can be connected together to provide the functionality of a conventional programmable logic device. Such devices have the advantage of not having to replicate structures that may not be used in a particular user logic design. Instead, they are provided with resources sufficient to create the same logic design as a convention programmable logic device to which it may be considered an equivalent.
Regardless of its particular type, a mask-programmable logic device typically has a number of fixed layers including fixed semiconductor layers and fixed metallization layers, with provisions for one or more programming metallization layers to be added to implement a customer's user logic design. Among the structures in the fixed layers are I/O ports, which may or may not be used in a particular user logic design.
It is axiomatic that a particular mask-programmable logic device, like a conventional programmable logic device, can only accommodate a user logic design of a certain size. A larger device would be required to accommodate larger designs. However, in most cases, when the limit of the size of the user logic design is reached, it is reached because all of a particular type of resource—either a routing or logic resource—has been used, even though there may other types of resources on the device that remain unused. For example, it may not be possible to route the user design with the available routing resources, while at the same time some of the aforementioned I/O ports remain unused.
It would be desirable to be able to maximize the amount of a mask-programmable logic device that can be used in a user logic design, and thereby maximize the size of user logic design that can be accommodated in a particular device.